//该脚本针对最普通，最常用的那款16位的sdram，对应初始化脚本为
//VC0830init_for_fpga_sram.inc

//只支持16进制输入
[SdramInfo]  
//32M      
sdram_size = 0x2000000
num  = 0x16		

//不包括最后的cmd寄存器, for sdram
//打一个补丁增加一个寄存器设置padc上控制lcdc/nfc/sdio驱动能力的寄存器
//切换到xclk
addr_off[0]         = 0x60000020
register_value[0]   = 0x1

//重新配置 sdradj
addr_off[1]         = 0x60000048
register_value[1]   = 0x0000e98e

//多等待等待
addr_off[2]         = 0x600000d8    //dll_rst_ctrl
register_value[2]   = 0x1b0		//disable auto reset dll after clk switch

addr_off[3]         = 0x600000d8    //dll_rst_ctrl
register_value[3]   = 0x1b0	//disable auto reset dll after clk switch

addr_off[4]         = 0x600000d8    
register_value[4]   = 0x1b0

addr_off[5]         = 0x600000d8    
register_value[5]   = 0x1b0		

//切回pll1
addr_off[6]         = 0x60000018
register_value[6]   = 0x0

addr_off[7]         = 0x60000020
register_value[7]   = 0x0

addr_off[8]         = 0x60011000    //dll_rst_ctrl
register_value[8]   = 0x4ac211a1		//disable auto reset dll after clk switch

addr_off[9]         = 0x60011004    //MARB_MEMORY_ADDR
register_value[9]   = 0x00000033		//32M must changed 

addr_off[10]         = 0x60011008    //SDR_DIR
register_value[10]   = 0x1959aa95

addr_off[11]         = 0x6001100c    //SDRC_CFG
register_value[11]   = 0x00000514

addr_off[12]         = 0x60011020    //SDRC_MODE
register_value[12]   = 0x00000042

addr_off[13]         = 0x600000d0    //sdrc_timing
register_value[13]   = 0x10011203

addr_off[14]         = 0x6001103c    //sdrc_rfrsh
register_value[14]   = 0x000000f0       

//0x0000e90e 0x000000f0 0x00000090 0x00000018 
                                 
addr_off[15]         = 0x60011040    //sdrc_rfrsh
register_value[15]   = 0x000000f0                                   
     
addr_off[16]         = 0x60011044    //RDPATH_CTRL 
register_value[16]   = 0x00000090
                                      
addr_off[17]         = 0x60011048    //phy_mux_sel
register_value[17]   = 0x00000018

addr_off[18]         = 0x6001104c    //ADJ_0  
register_value[18]   = 0x00000018

addr_off[19]         = 0x600000d8    //ADJ_1
register_value[19]   = 0x00000200
                                      
addr_off[20]         = 0x600000d8    //ADJ_2
register_value[20]   = 0x000001b0
                                      
addr_off[21]         = 0x60051708    
register_value[21]   = 0x380
                        
addr_off[22]        = 0x0
register_value[22]  = 0x0

addr_off[23]        = 0x0
register_value[23]  = 0x0

addr_off[24]        = 0x0
register_value[24]  = 0x0

addr_off[25]        = 0x0
register_value[25]  = 0x0

padc_register_value[0] = 0x2            //SDR_PAD_RX_TYPE   0x60051900
padc_register_value[1] = 0x0     //SDR_A_S0          0x60051904
padc_register_value[2] = 0x0     //SDR_OTHER_S0      0x60051908
padc_register_value[3] = 0xffffffff     //SDR_A_S1          0x6005190c
padc_register_value[4] = 0xffffffff     //SDR_OTHER_S1      0x60051910
padc_register_value[5] = 0x0            //SDR_A_A2          0x60051914
padc_register_value[6] = 0x0            //SDR_OTHER_A2      0x60051918
padc_register_value[7] = 0x0            //SDR_A_A6          0x6005191c
padc_register_value[8] = 0x0            //SDR_other_A6      0x60051920
padc_register_value[9] = 0x0            //SDR_A_PWD         0x60051924
padc_register_value[10] = 0x0           //SDR_OTHER_PWD     0x60051928
padc_register_value[11] = 0x0           //SDR_DIR           0x60051954




[ImageStoreInfo]
start_block = 0x10
start_block_backup = 0x0a
image_max_block_num = 0x300
first_page_story_num = 0x0a

[ImageBootInfo]
boot_mode = 0x1
boot_len  = 0x60000

[PLLInfo]
PLL_dealth_mode = 0x00
cpu_bus_reg_value = 0x0
per_reg_value = 0x0

[ProgModeInfo]
program_mode = 0x3

